Lot integrity is maintained throughout fab, assembly and test using proper controls and qualifications. Foundry, assembly and test houses are highly certified. Regular audits are conducted to ensure quality and process are top notch as part of our continuous improvement programs.

100% traceability is maintained through part number, wafer lot code, assembly vendor, date code, and country of origin. Production wafer travelers will contain test site wafer parametric data, wafer sort and yield data, build sheets, test data and QA test results.

ESD prevention is emphasized at all levels. An adaptive facility, fixture, clothing, and handling techniques are employed consistent with ESD Association recommendations.

Wafers are required to pass standard test pattern with incoming inspection comprised of over 100 electrical tests. Wafer sort yields are standardized by product and device type.

Lots are subjected to long term reliability.
High Temperature Reverse Bias (HTRB)
Autoclave (Pressure Cooker) Test
Temperature Cycle Test
Cross Section Analysis
SONIX Acoustic Analysis
Burn In Test and other reliability tests